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[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [divisor.vhd] - Rev 28

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15 Taking out some warnings and transparent latches from the design leonardoaraujo.santos 4591d 07h /uart_block/trunk/hdl/iseProject/divisor.vhd
14 Fixing some warnings... Adding wishbone slave leonardoaraujo.santos 4592d 02h /uart_block/trunk/hdl/iseProject/divisor.vhd
9 Adding Control unit for uart block leonardoaraujo.santos 4592d 22h /uart_block/trunk/hdl/iseProject/divisor.vhd
5 Adding sequential division (32 cycles per 32 bit word) leonardoaraujo.santos 4599d 07h /uart_block/trunk/hdl/iseProject/divisor.vhd

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