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[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [iseProject.gise] - Rev 36

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36 Working on the documentation leonardoaraujo.santos 4695d 21h /uart_block/trunk/hdl/iseProject/iseProject.gise
35 Bug really fixed... Some testbench results saved... Now would be a nice Idea to start thinking about documentation... leonardoaraujo.santos 4698d 21h /uart_block/trunk/hdl/iseProject/iseProject.gise
34 Seems that the issue is solved (working on Spartan3E board and confirmed with chipscope) leonardoaraujo.santos 4699d 00h /uart_block/trunk/hdl/iseProject/iseProject.gise
31 Working on documentation and on Chipscope leonardoaraujo.santos 4700d 17h /uart_block/trunk/hdl/iseProject/iseProject.gise
30 Preparing to work with chipscope leonardoaraujo.santos 4700d 17h /uart_block/trunk/hdl/iseProject/iseProject.gise
29 Preparing to work with chipscope leonardoaraujo.santos 4700d 18h /uart_block/trunk/hdl/iseProject/iseProject.gise
28 Changing wrong datasheet of Spartan3A kit for newer one.... Detected some bug on the reception (When is fast it seems that the reception could be wrong...) leonardoaraujo.santos 4700d 19h /uart_block/trunk/hdl/iseProject/iseProject.gise
27 First version seems working nice on the PC!!! leonardoaraujo.santos 4700d 19h /uart_block/trunk/hdl/iseProject/iseProject.gise
20 Finishing at least the tests on testbench.... Was good to verify that the uart_control should be redesigned to allow concurrent receive and to clean the code... leonardoaraujo.santos 4702d 19h /uart_block/trunk/hdl/iseProject/iseProject.gise
19 Working on the top wishbone slave testbench.... still need some fixes (Both on the testbench and on the uart_control.vhd) leonardoaraujo.santos 4702d 20h /uart_block/trunk/hdl/iseProject/iseProject.gise
18 sdsd leonardoaraujo.santos 4703d 02h /uart_block/trunk/hdl/iseProject/iseProject.gise
17 Working on slave testbench and fixing some bugs leonardoaraujo.santos 4703d 04h /uart_block/trunk/hdl/iseProject/iseProject.gise
16 Adding testbench for wishbone slave module leonardoaraujo.santos 4703d 04h /uart_block/trunk/hdl/iseProject/iseProject.gise
15 Taking out some warnings and transparent latches from the design leonardoaraujo.santos 4703d 05h /uart_block/trunk/hdl/iseProject/iseProject.gise
14 Fixing some warnings... Adding wishbone slave leonardoaraujo.santos 4704d 01h /uart_block/trunk/hdl/iseProject/iseProject.gise
13 Working on uart_control testbench... also applying some fixes... leonardoaraujo.santos 4704d 02h /uart_block/trunk/hdl/iseProject/iseProject.gise
12 Working on the communication blocks leonardoaraujo.santos 4704d 03h /uart_block/trunk/hdl/iseProject/iseProject.gise
11 Adding uart_communication_block leonardoaraujo.santos 4704d 05h /uart_block/trunk/hdl/iseProject/iseProject.gise
10 Working on the control unit part leonardoaraujo.santos 4704d 09h /uart_block/trunk/hdl/iseProject/iseProject.gise
9 Adding Control unit for uart block leonardoaraujo.santos 4704d 21h /uart_block/trunk/hdl/iseProject/iseProject.gise

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