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[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [iseProject.xise] - Rev 37

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35 Bug really fixed... Some testbench results saved... Now would be a nice Idea to start thinking about documentation... leonardoaraujo.santos 5125d 00h /uart_block/trunk/hdl/iseProject/iseProject.xise
34 Seems that the issue is solved (working on Spartan3E board and confirmed with chipscope) leonardoaraujo.santos 5125d 03h /uart_block/trunk/hdl/iseProject/iseProject.xise
32 Change baud generator to create a overclock frequency of 8x the baud rate....
Change the serial receiver to sample the signal on the middle of the serial input, now it's using only the overclocked baud...		 leonardoaraujo.santos 5126d 08h /uart_block/trunk/hdl/iseProject/iseProject.xise
29 Preparing to work with chipscope leonardoaraujo.santos 5126d 21h /uart_block/trunk/hdl/iseProject/iseProject.xise
27 First version seems working nice on the PC!!! leonardoaraujo.santos 5126d 22h /uart_block/trunk/hdl/iseProject/iseProject.xise
24 Working on testbench and refactoring... now we could start some tests on the board... leonardoaraujo.santos 5128d 03h /uart_block/trunk/hdl/iseProject/iseProject.xise
23 Working on uart_control refactoring leonardoaraujo.santos 5128d 04h /uart_block/trunk/hdl/iseProject/iseProject.xise
22 Refactoring the uart_control leonardoaraujo.santos 5128d 07h /uart_block/trunk/hdl/iseProject/iseProject.xise
21 Preparing to rewrite uart_control, adding pin to indicate data available at the RX leonardoaraujo.santos 5128d 14h /uart_block/trunk/hdl/iseProject/iseProject.xise
20 Finishing at least the tests on testbench.... Was good to verify that the uart_control should be redesigned to allow concurrent receive and to clean the code... leonardoaraujo.santos 5128d 22h /uart_block/trunk/hdl/iseProject/iseProject.xise
19 Working on the top wishbone slave testbench.... still need some fixes (Both on the testbench and on the uart_control.vhd) leonardoaraujo.santos 5128d 22h /uart_block/trunk/hdl/iseProject/iseProject.xise
16 Adding testbench for wishbone slave module leonardoaraujo.santos 5129d 07h /uart_block/trunk/hdl/iseProject/iseProject.xise
15 Taking out some warnings and transparent latches from the design leonardoaraujo.santos 5129d 08h /uart_block/trunk/hdl/iseProject/iseProject.xise
14 Fixing some warnings... Adding wishbone slave leonardoaraujo.santos 5130d 04h /uart_block/trunk/hdl/iseProject/iseProject.xise
13 Working on uart_control testbench... also applying some fixes... leonardoaraujo.santos 5130d 04h /uart_block/trunk/hdl/iseProject/iseProject.xise
12 Working on the communication blocks leonardoaraujo.santos 5130d 06h /uart_block/trunk/hdl/iseProject/iseProject.xise
11 Adding uart_communication_block leonardoaraujo.santos 5130d 08h /uart_block/trunk/hdl/iseProject/iseProject.xise
10 Working on the control unit part leonardoaraujo.santos 5130d 12h /uart_block/trunk/hdl/iseProject/iseProject.xise
9 Adding Control unit for uart block leonardoaraujo.santos 5130d 23h /uart_block/trunk/hdl/iseProject/iseProject.xise
8 Solving some bugs in baud_generator.vhd leonardoaraujo.santos 5131d 10h /uart_block/trunk/hdl/iseProject/iseProject.xise

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