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[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [isim.log] - Rev 34

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32 Change baud generator to create a overclock frequency of 8x the baud rate....
Change the serial receiver to sample the signal on the middle of the serial input, now it's using only the overclocked baud...
leonardoaraujo.santos 4718d 02h /uart_block/trunk/hdl/iseProject/isim.log
24 Working on testbench and refactoring... now we could start some tests on the board... leonardoaraujo.santos 4719d 21h /uart_block/trunk/hdl/iseProject/isim.log
23 Working on uart_control refactoring leonardoaraujo.santos 4719d 22h /uart_block/trunk/hdl/iseProject/isim.log
22 Refactoring the uart_control leonardoaraujo.santos 4720d 01h /uart_block/trunk/hdl/iseProject/isim.log
21 Preparing to rewrite uart_control, adding pin to indicate data available at the RX leonardoaraujo.santos 4720d 08h /uart_block/trunk/hdl/iseProject/isim.log
20 Finishing at least the tests on testbench.... Was good to verify that the uart_control should be redesigned to allow concurrent receive and to clean the code... leonardoaraujo.santos 4720d 16h /uart_block/trunk/hdl/iseProject/isim.log
19 Working on the top wishbone slave testbench.... still need some fixes (Both on the testbench and on the uart_control.vhd) leonardoaraujo.santos 4720d 16h /uart_block/trunk/hdl/iseProject/isim.log
18 sdsd leonardoaraujo.santos 4720d 23h /uart_block/trunk/hdl/iseProject/isim.log
17 Working on slave testbench and fixing some bugs leonardoaraujo.santos 4721d 00h /uart_block/trunk/hdl/iseProject/isim.log
16 Adding testbench for wishbone slave module leonardoaraujo.santos 4721d 01h /uart_block/trunk/hdl/iseProject/isim.log
15 Taking out some warnings and transparent latches from the design leonardoaraujo.santos 4721d 02h /uart_block/trunk/hdl/iseProject/isim.log
14 Fixing some warnings... Adding wishbone slave leonardoaraujo.santos 4721d 22h /uart_block/trunk/hdl/iseProject/isim.log
13 Working on uart_control testbench... also applying some fixes... leonardoaraujo.santos 4721d 22h /uart_block/trunk/hdl/iseProject/isim.log
12 Working on the communication blocks leonardoaraujo.santos 4722d 00h /uart_block/trunk/hdl/iseProject/isim.log
11 Adding uart_communication_block leonardoaraujo.santos 4722d 02h /uart_block/trunk/hdl/iseProject/isim.log
10 Working on the control unit part leonardoaraujo.santos 4722d 06h /uart_block/trunk/hdl/iseProject/isim.log
9 Adding Control unit for uart block leonardoaraujo.santos 4722d 17h /uart_block/trunk/hdl/iseProject/isim.log
8 Solving some bugs in baud_generator.vhd leonardoaraujo.santos 4723d 04h /uart_block/trunk/hdl/iseProject/isim.log
6 Adding baud generator leonardoaraujo.santos 4724d 01h /uart_block/trunk/hdl/iseProject/isim.log
4 Working on receiver leonardoaraujo.santos 4731d 03h /uart_block/trunk/hdl/iseProject/isim.log

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