URL https://opencores.org/ocsvn/uart_block/uart_block/trunk

Subversion Repositories uart_block

[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [xst/] [work/] [hdllib.ref] - Rev 18

Rev	Log message	Author	Age	Path
16	Adding testbench for wishbone slave module	leonardoaraujo.santos	4571d 04h	/uart_block/trunk/hdl/iseProject/xst/work/hdllib.ref
15	Taking out some warnings and transparent latches from the design	leonardoaraujo.santos	4571d 05h	/uart_block/trunk/hdl/iseProject/xst/work/hdllib.ref
14	Fixing some warnings... Adding wishbone slave	leonardoaraujo.santos	4572d 01h	/uart_block/trunk/hdl/iseProject/xst/work/hdllib.ref
13	Working on uart_control testbench... also applying some fixes...	leonardoaraujo.santos	4572d 02h	/uart_block/trunk/hdl/iseProject/xst/work/hdllib.ref
11	Adding uart_communication_block	leonardoaraujo.santos	4572d 06h	/uart_block/trunk/hdl/iseProject/xst/work/hdllib.ref
6	Adding baud generator	leonardoaraujo.santos	4574d 04h	/uart_block/trunk/hdl/iseProject/xst/work/hdllib.ref
4	Working on receiver	leonardoaraujo.santos	4581d 06h	/uart_block/trunk/hdl/iseProject/xst/work/hdllib.ref
2	Starting here ....	leonardoaraujo.santos	4581d 08h	/uart_block/trunk/hdl/iseProject/xst/work/hdllib.ref