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[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [xst/] [work/] [sub00/] [vhpl00.vho] - Rev 34

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32 Change baud generator to create a overclock frequency of 8x the baud rate....
Change the serial receiver to sample the signal on the middle of the serial input, now it's using only the overclocked baud...		 leonardoaraujo.santos 4434d 18h /uart_block/trunk/hdl/iseProject/xst/work/sub00/vhpl00.vho
27 First version seems working nice on the PC!!! leonardoaraujo.santos 4435d 08h /uart_block/trunk/hdl/iseProject/xst/work/sub00/vhpl00.vho
24 Working on testbench and refactoring... now we could start some tests on the board... leonardoaraujo.santos 4436d 13h /uart_block/trunk/hdl/iseProject/xst/work/sub00/vhpl00.vho
21 Preparing to rewrite uart_control, adding pin to indicate data available at the RX leonardoaraujo.santos 4437d 00h /uart_block/trunk/hdl/iseProject/xst/work/sub00/vhpl00.vho
19 Working on the top wishbone slave testbench.... still need some fixes (Both on the testbench and on the uart_control.vhd) leonardoaraujo.santos 4437d 08h /uart_block/trunk/hdl/iseProject/xst/work/sub00/vhpl00.vho
15 Taking out some warnings and transparent latches from the design leonardoaraujo.santos 4437d 18h /uart_block/trunk/hdl/iseProject/xst/work/sub00/vhpl00.vho
11 Adding uart_communication_block leonardoaraujo.santos 4438d 18h /uart_block/trunk/hdl/iseProject/xst/work/sub00/vhpl00.vho
6 Adding baud generator leonardoaraujo.santos 4440d 17h /uart_block/trunk/hdl/iseProject/xst/work/sub00/vhpl00.vho
4 Working on receiver leonardoaraujo.santos 4447d 18h /uart_block/trunk/hdl/iseProject/xst/work/sub00/vhpl00.vho
2 Starting here .... leonardoaraujo.santos 4447d 20h /uart_block/trunk/hdl/iseProject/xst/work/sub00/vhpl00.vho

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