URL https://opencores.org/ocsvn/uart_fpga_slow_control_migrated/uart_fpga_slow_control_migrated/trunk

Subversion Repositories uart_fpga_slow_control_migrated

[/] [uart_fpga_slow_control/] [trunk/] [documents/] [UART_wr.bmp] - Rev 34

Rev	Log message	Author	Age	Path
8	ADDED: some more documentation 1) screenshot of a full read and write sequence with questasim 2) example hex commands to be sent via RealTerm	aborga	4673d 20h	/uart_fpga_slow_control/trunk/documents/UART_wr.bmp