OpenCores
URL https://opencores.org/ocsvn/usbhostslave/usbhostslave/trunk

Subversion Repositories usbhostslave

[/] [usbhostslave/] [trunk/] [RTL/] [hostController/] [hostcontroller.asf] - Rev 44

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
40 New directory structure. root 5738d 12h /usbhostslave/trunk/RTL/hostController/hostcontroller.asf
37 usbHostSlave - Release 2.0. Seperate host and slave top level modules, in addition the original combined host/slave. Improved cross clock domain synchronisation. Fixed wishbone ack bug. Improved fifo reset synchronisation. Added registers to support USB-PHY, ie USB voltage detect, pull-up enable, and full/low speed selection. Removed Altera SOPC component, removed SystemC testbench, and Aldec simulation. Added Icarus Verilog simulation. Added usbDevice sub-project sfielding 5935d 22h /usbhostslave/trunk/RTL/hostController/hostcontroller.asf
22 Release 1.2 sfielding 6616d 18h /usbhostslave/trunk/RTL/hostController/hostcontroller.asf
18 Added dual clock, fixed slave bug, added reset register sfielding 6952d 07h /usbhostslave/trunk/RTL/hostController/hostcontroller.asf
14 Added LS keep alive, fixed clock recovery bug sfielding 7200d 18h /usbhostslave/trunk/RTL/hostController/hostcontroller.asf
9 Fixed bus turn-around problems, added version number sfielding 7248d 08h /usbhostslave/trunk/RTL/hostController/hostcontroller.asf
7 Fixed some blocking assignments, changed module name, fixed SOF_TX_TIME sfielding 7268d 08h /usbhostslave/trunk/RTL/hostController/hostcontroller.asf
5 Removed html documentation sfielding 7281d 08h /usbhostslave/trunk/RTL/hostController/hostcontroller.asf
2 Created sfielding 7349d 18h /usbhostslave/trunk/RTL/hostController/hostcontroller.asf

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.