OpenCores
URL https://opencores.org/ocsvn/usbhostslave/usbhostslave/trunk

Subversion Repositories usbhostslave

[/] [usbhostslave/] [trunk/] [RTL/] [serialInterfaceEngine/] [SIETransmitter.asf] - Rev 43

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
40 New directory structure. root 5717d 15h /usbhostslave/trunk/RTL/serialInterfaceEngine/SIETransmitter.asf
37 usbHostSlave - Release 2.0. Seperate host and slave top level modules, in addition the original combined host/slave. Improved cross clock domain synchronisation. Fixed wishbone ack bug. Improved fifo reset synchronisation. Added registers to support USB-PHY, ie USB voltage detect, pull-up enable, and full/low speed selection. Removed Altera SOPC component, removed SystemC testbench, and Aldec simulation. Added Icarus Verilog simulation. Added usbDevice sub-project sfielding 5915d 00h /usbhostslave/trunk/RTL/serialInterfaceEngine/SIETransmitter.asf
34 *** empty log message *** sfielding 6593d 19h /usbhostslave/trunk/RTL/serialInterfaceEngine/SIETransmitter.asf
33 *** empty log message *** sfielding 6593d 22h /usbhostslave/trunk/RTL/serialInterfaceEngine/SIETransmitter.asf
22 Release 1.2 sfielding 6595d 21h /usbhostslave/trunk/RTL/serialInterfaceEngine/SIETransmitter.asf
14 Added LS keep alive, fixed clock recovery bug sfielding 7179d 21h /usbhostslave/trunk/RTL/serialInterfaceEngine/SIETransmitter.asf
9 Fixed bus turn-around problems, added version number sfielding 7227d 11h /usbhostslave/trunk/RTL/serialInterfaceEngine/SIETransmitter.asf
7 Fixed some blocking assignments, changed module name, fixed SOF_TX_TIME sfielding 7247d 10h /usbhostslave/trunk/RTL/serialInterfaceEngine/SIETransmitter.asf
5 Removed html documentation sfielding 7260d 11h /usbhostslave/trunk/RTL/serialInterfaceEngine/SIETransmitter.asf
2 Created sfielding 7328d 21h /usbhostslave/trunk/RTL/serialInterfaceEngine/SIETransmitter.asf

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.