OpenCores
URL https://opencores.org/ocsvn/usbhostslave/usbhostslave/trunk

Subversion Repositories usbhostslave

[/] [usbhostslave/] [trunk/] [doc/] [README.txt] - Rev 42

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
40 New directory structure. root 5717d 18h /usbhostslave/trunk/doc/README.txt
37 usbHostSlave - Release 2.0. Seperate host and slave top level modules, in addition the original combined host/slave. Improved cross clock domain synchronisation. Fixed wishbone ack bug. Improved fifo reset synchronisation. Added registers to support USB-PHY, ie USB voltage detect, pull-up enable, and full/low speed selection. Removed Altera SOPC component, removed SystemC testbench, and Aldec simulation. Added Icarus Verilog simulation. Added usbDevice sub-project sfielding 5915d 04h /usbhostslave/trunk/doc/README.txt
22 Release 1.2 sfielding 6596d 01h /usbhostslave/trunk/doc/README.txt
20 Fixed RX clock recovery bug, and RX time out bug sfielding 6826d 23h /usbhostslave/trunk/doc/README.txt
18 Added dual clock, fixed slave bug, added reset register sfielding 6931d 14h /usbhostslave/trunk/doc/README.txt
17 added version info sfielding 7070d 16h /usbhostslave/trunk/doc/README.txt
11 Added readme sfielding 7211d 11h /usbhostslave/trunk/doc/README.txt

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.