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[/] [usbhostslave/] [trunk/] [doc/] [src/] [USBHostSlave_IPCore_Specification.sxw] - Rev 40

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Rev Log message Author Age Path
40 New directory structure. root 5724d 18h /usbhostslave/trunk/doc/src/USBHostSlave_IPCore_Specification.sxw
37 usbHostSlave - Release 2.0. Seperate host and slave top level modules, in addition the original combined host/slave. Improved cross clock domain synchronisation. Fixed wishbone ack bug. Improved fifo reset synchronisation. Added registers to support USB-PHY, ie USB voltage detect, pull-up enable, and full/low speed selection. Removed Altera SOPC component, removed SystemC testbench, and Aldec simulation. Added Icarus Verilog simulation. Added usbDevice sub-project sfielding 5922d 03h /usbhostslave/trunk/doc/src/USBHostSlave_IPCore_Specification.sxw
22 Release 1.2 sfielding 6603d 00h /usbhostslave/trunk/doc/src/USBHostSlave_IPCore_Specification.sxw
18 Added dual clock, fixed slave bug, added reset register sfielding 6938d 13h /usbhostslave/trunk/doc/src/USBHostSlave_IPCore_Specification.sxw
16 Added bus access to SOF timer sfielding 7077d 15h /usbhostslave/trunk/doc/src/USBHostSlave_IPCore_Specification.sxw
14 Added LS keep alive, fixed clock recovery bug sfielding 7187d 00h /usbhostslave/trunk/doc/src/USBHostSlave_IPCore_Specification.sxw
12 try again sfielding 7217d 15h /usbhostslave/trunk/doc/src/USBHostSlave_IPCore_Specification.sxw
9 Fixed bus turn-around problems, added version number sfielding 7234d 14h /usbhostslave/trunk/doc/src/USBHostSlave_IPCore_Specification.sxw
5 Removed html documentation sfielding 7267d 13h /usbhostslave/trunk/doc/src/USBHostSlave_IPCore_Specification.sxw
2 Created sfielding 7336d 00h /usbhostslave/trunk/doc/src/USBHostSlave_IPCore_Specification.sxw

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