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[/] [usbhostslave/] [trunk/] [usbDevice/] [syn/] [Actel/] [usbDeviceActelTop/] [hdl/] [endpMux.v] - Rev 44

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Rev Log message Author Age Path
40 New directory structure. root 5718d 11h /usbhostslave/trunk/usbDevice/syn/Actel/usbDeviceActelTop/hdl/endpMux.v
37 usbHostSlave - Release 2.0. Seperate host and slave top level modules, in addition the original combined host/slave. Improved cross clock domain synchronisation. Fixed wishbone ack bug. Improved fifo reset synchronisation. Added registers to support USB-PHY, ie USB voltage detect, pull-up enable, and full/low speed selection. Removed Altera SOPC component, removed SystemC testbench, and Aldec simulation. Added Icarus Verilog simulation. Added usbDevice sub-project sfielding 5915d 21h /usbhostslave/trunk/usbDevice/syn/Actel/usbDeviceActelTop/hdl/endpMux.v

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