URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [clk_and_reset.v] - Rev 139

Rev	Log message	Author	Age	Path
139		unneback	4779d 11h	/versatile_library/trunk/rtl/verilog/clk_and_reset.v
48	wb updated	unneback	4961d 15h	/versatile_library/trunk/rtl/verilog/clk_and_reset.v
40	new build environment with custom.v added as a result file	unneback	5070d 19h	/versatile_library/trunk/rtl/verilog/clk_and_reset.v
33	updated wb3wb3_bridge	unneback	5092d 10h	/versatile_library/trunk/rtl/verilog/clk_and_reset.v
32	added vl_pll for ALTERA (cycloneIII)	unneback	5099d 20h	/versatile_library/trunk/rtl/verilog/clk_and_reset.v
21	reg -> wire in and or mux in logic	unneback	5124d 07h	/versatile_library/trunk/rtl/verilog/clk_and_reset.v
18	naming convention vl_	unneback	5125d 18h	/versatile_library/trunk/rtl/verilog/clk_and_reset.v
17		unneback	5189d 08h	/versatile_library/trunk/rtl/verilog/clk_and_reset.v
4	added counters	unneback	5216d 13h	/versatile_library/trunk/rtl/verilog/clk_and_reset.v
3	various updates counter added	unneback	5219d 09h	/versatile_library/trunk/rtl/verilog/clk_and_reset.v