URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [clk_and_reset.v] - Rev 61

Rev	Log message	Author	Age	Path
48	wb updated	unneback	4934d 10h	/versatile_library/trunk/rtl/verilog/clk_and_reset.v
40	new build environment with custom.v added as a result file	unneback	5043d 13h	/versatile_library/trunk/rtl/verilog/clk_and_reset.v
33	updated wb3wb3_bridge	unneback	5065d 04h	/versatile_library/trunk/rtl/verilog/clk_and_reset.v
32	added vl_pll for ALTERA (cycloneIII)	unneback	5072d 14h	/versatile_library/trunk/rtl/verilog/clk_and_reset.v
21	reg -> wire in and or mux in logic	unneback	5097d 02h	/versatile_library/trunk/rtl/verilog/clk_and_reset.v
18	naming convention vl_	unneback	5098d 13h	/versatile_library/trunk/rtl/verilog/clk_and_reset.v
17		unneback	5162d 02h	/versatile_library/trunk/rtl/verilog/clk_and_reset.v
4	added counters	unneback	5189d 08h	/versatile_library/trunk/rtl/verilog/clk_and_reset.v
3	various updates counter added	unneback	5192d 03h	/versatile_library/trunk/rtl/verilog/clk_and_reset.v