URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [logic.v] - Rev 152

Rev	Log message	Author	Age	Path
46	updated parity	unneback	5030d 22h	/versatile_library/trunk/rtl/verilog/logic.v
44	added target independet IO functionns	unneback	5035d 16h	/versatile_library/trunk/rtl/verilog/logic.v
43	added logic for parity generation and check	unneback	5039d 19h	/versatile_library/trunk/rtl/verilog/logic.v
42	updated mux_andor	unneback	5043d 19h	/versatile_library/trunk/rtl/verilog/logic.v
40	new build environment with custom.v added as a result file	unneback	5043d 20h	/versatile_library/trunk/rtl/verilog/logic.v
38	updated andor mux	unneback	5044d 17h	/versatile_library/trunk/rtl/verilog/logic.v
36	added generic andor_mux	unneback	5051d 22h	/versatile_library/trunk/rtl/verilog/logic.v
35	added vl_mux2_andor and vl_mux3_andor localparam	unneback	5052d 09h	/versatile_library/trunk/rtl/verilog/logic.v
34	added vl_mux2_andor and vl_mux3_andor	unneback	5052d 10h	/versatile_library/trunk/rtl/verilog/logic.v
32	added vl_pll for ALTERA (cycloneIII)	unneback	5072d 21h	/versatile_library/trunk/rtl/verilog/logic.v