URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [wb.v] - Rev 44

Rev	Log message	Author	Age	Path
44	added target independet IO functionns	unneback	5067d 12h	/versatile_library/trunk/rtl/verilog/wb.v
42	updated mux_andor	unneback	5075d 15h	/versatile_library/trunk/rtl/verilog/wb.v
40	new build environment with custom.v added as a result file	unneback	5075d 17h	/versatile_library/trunk/rtl/verilog/wb.v
39	added simple port prio based wb arbiter	unneback	5076d 14h	/versatile_library/trunk/rtl/verilog/wb.v
33	updated wb3wb3_bridge	unneback	5097d 08h	/versatile_library/trunk/rtl/verilog/wb.v
32	added vl_pll for ALTERA (cycloneIII)	unneback	5104d 18h	/versatile_library/trunk/rtl/verilog/wb.v
18	naming convention vl_	unneback	5130d 17h	/versatile_library/trunk/rtl/verilog/wb.v
17		unneback	5194d 06h	/versatile_library/trunk/rtl/verilog/wb.v
14	reg -> wire for various signals	unneback	5200d 19h	/versatile_library/trunk/rtl/verilog/wb.v
13	cosmetic update	unneback	5200d 21h	/versatile_library/trunk/rtl/verilog/wb.v
12	added wishbone comliant modules	unneback	5201d 17h	/versatile_library/trunk/rtl/verilog/wb.v