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[/] [w11/] [tags/] [w11a_V0.6/] [rtl/] [vlib/] [xlib/] [xlib.vhd] - Rev 27

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Rev Log message Author Age Path
24 - major release w11a_V0.60 (tagged) wfjm 3686d 20h /w11/tags/w11a_V0.6/rtl/vlib/xlib/xlib.vhd
22 - interim release w11a_V0.581 (untagged)
- new reference system
- switched from ISE 13.3 to 14.7.
- map/par behaviour changed, unfortunately unfavorably for w11a.
On Nexys3 no timing closure anymore for 80 MHz, only 72 MHz can
be achieved now.
- new man pages (in doc/man/man1/)
- support for Spartan-6 CMTs in PLL and DCM mode		 wfjm 3694d 21h /w11/tags/w11a_V0.6/rtl/vlib/xlib/xlib.vhd
15 - interim release w11a_V0.54 (untagged)
- add Nexys3 port of w11a		 wfjm 4601d 21h /w11/tags/w11a_V0.6/rtl/vlib/xlib/xlib.vhd
13 - interim release w11a_V0.532 (untagged)
- re-organize modules 'human I/O' interface on Digilent boards
- add test designs for 'human I/O' interface for atlys,nexys2, and s3board
- small updates in crc8 and dcm areas
- with one exception all vhdl sources use now numeric_std		 wfjm 4616d 06h /w11/tags/w11a_V0.6/rtl/vlib/xlib/xlib.vhd
12 - interim release w11a_V0.531 (untagged)
- many small changes to prepare upcoming support for Spartan-6 and
usage of Cypress FX2 USB interface on nexys2/3 and atlys boards		 wfjm 4684d 21h /w11/tags/w11a_V0.6/rtl/vlib/xlib/xlib.vhd
8 - interim release w11a_V0.51 (untagged)
- migrate to ibus protocol verion 2
- nexys2 systems now with DCM derived system clock supported
- sys_w11a_n2 now runs with 58 MHz clksys		 wfjm 4973d 19h /w11/tags/w11a_V0.6/rtl/vlib/xlib/xlib.vhd
2 initial source upload (no docs yet) wfjm 5115d 00h /w11/tags/w11a_V0.6/rtl/vlib/xlib/xlib.vhd

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