URL https://opencores.org/ocsvn/wb_z80/wb_z80/trunk

Subversion Repositories wb_z80

[/] [wb_z80/] [trunk/] [rtl/] [z80_memstate2.v] - Rev 41

Rev	Log message	Author	Age	Path
39	New directory structure.	root	5622d 13h	/wb_z80/trunk/rtl/z80_memstate2.v
38	Included some Xilinx compiler related fixes from Howard Harte	bporcella	6133d 02h	/wb_z80/trunk/rtl/z80_memstate2.v
35	added fix for IN bug found by howard	bporcella	6137d 06h	/wb_z80/trunk/rtl/z80_memstate2.v
32	fixed bugs and augmented instruction test. ex de hl bug fixed thanks Howard Harte ret condition (ret not taken bug) thanks - Stephen Warren	bporcella	6147d 03h	/wb_z80/trunk/rtl/z80_memstate2.v
31	some fixes found in synthesis	bporcella	7363d 03h	/wb_z80/trunk/rtl/z80_memstate2.v
27	Instruction test (with interrupts) runs!!!	bporcella	7370d 09h	/wb_z80/trunk/rtl/z80_memstate2.v
26	inst test got to the worked macro	bporcella	7376d 21h	/wb_z80/trunk/rtl/z80_memstate2.v
25	instruction test getting to final stages	bporcella	7379d 01h	/wb_z80/trunk/rtl/z80_memstate2.v
23	testbed built and verification in progress	bporcella	7384d 08h	/wb_z80/trunk/rtl/z80_memstate2.v
17	first core build	bporcella	7400d 02h	/wb_z80/trunk/rtl/z80_memstate2.v