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[/] [wbddr3/] [trunk/] [bench/] [cpp/] [pddrsim.cpp] - Rev 20

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18 We now pass all tests again--this time for a 4:1 controller, with a CAS of 5
and a CWL of 5. This is designed for a memory running at 320MHz,
transmitting across the data lines as 640Mbps, and yet running internally at
only 80MHz.
dgisselq 2990d 21h /wbddr3/trunk/bench/cpp/pddrsim.cpp
16 New, modified code, now works in simulation!! dgisselq 3019d 02h /wbddr3/trunk/bench/cpp/pddrsim.cpp

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