OpenCores
URL https://opencores.org/ocsvn/wbuart32/wbuart32/trunk

Subversion Repositories wbuart32

[/] [wbuart32/] [trunk/] [bench/] [cpp/] [uartsim.h] - Rev 26

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
26 Formally verified the TXUART core (plus others) dgisselq 1915d 15h /wbuart32/trunk/bench/cpp/uartsim.h
23 Brought SVN repo up to date with github repo dgisselq 2117d 01h /wbuart32/trunk/bench/cpp/uartsim.h
18 Lots of updates. See the git log for details dgisselq 2403d 19h /wbuart32/trunk/bench/cpp/uartsim.h
11 Modified mkspeech to create both hex and include files, to tailor for the broken ISE program. dgisselq 2672d 01h /wbuart32/trunk/bench/cpp/uartsim.h
2 A first version to be checked in. The rxuart.v and txuart.v files have been
well tested elsewhere, although the test setup here has not been as well tested.
Still, type 'make test' in the base directory and you will get an assurance
that the entire thing works--if you would like.
dgisselq 2850d 01h /wbuart32/trunk/bench/cpp/uartsim.h

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.