URL https://opencores.org/ocsvn/wbuart32/wbuart32/trunk

Subversion Repositories wbuart32

[/] [wbuart32/] [trunk/] [bench/] [verilog/] [Makefile] - Rev 25

Rev	Log message	Author	Age	Path
18	Lots of updates. See the git log for details	dgisselq	2546d 14h	/wbuart32/trunk/bench/verilog/Makefile
15	Added a set of lite-UARTs that only handle 8N1 to the repository.	dgisselq	2778d 21h	/wbuart32/trunk/bench/verilog/Makefile
5	Created independent peripheral, several toplevel tests, and updated documentation to match.	dgisselq	2859d 12h	/wbuart32/trunk/bench/verilog/Makefile
2	A first version to be checked in. The rxuart.v and txuart.v files have been well tested elsewhere, although the test setup here has not been as well tested. Still, type 'make test' in the base directory and you will get an assurance that the entire thing works--if you would like.	dgisselq	2992d 20h	/wbuart32/trunk/bench/verilog/Makefile