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[/] [xgate/] [trunk/] [README.txt] - Rev 68

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66 Fix testbench and RISC core related to debug mode and wait states. rehayes 5208d 23h /xgate/trunk/README.txt
61 Update to RISC block to fix DEBUG mode, testbench update rehayes 5225d 22h /xgate/trunk/README.txt
58 WISHBONE Bus update. rehayes 5277d 22h /xgate/trunk/README.txt
56 Extensive changes to testbench and the Xgate master bus interface and the way the RISC handles wait states. rehayes 5294d 02h /xgate/trunk/README.txt
51 Corrections to ADC and SBC instructions, First pass at documentaion instruction set details rehayes 5309d 22h /xgate/trunk/README.txt
44 Update for single program counter added, WISHBONE Slave bus word addressability and byte selection rehayes 5343d 20h /xgate/trunk/README.txt
41 Update for singel program counter added, WISHBONE Slave bus word addressability and byte selection rehayes 5344d 22h /xgate/trunk/README.txt
38 Nov 9 2009 update notes rehayes 5373d 03h /xgate/trunk/README.txt
23 Oct 7, 2009 Update rehayes 5405d 22h /xgate/trunk/README.txt
14 Sept 23 2009 Change update rehayes 5419d 22h /xgate/trunk/README.txt
5 Update for memory wait states, testbench and instruction decoder simplified for synthesis rehayes 5432d 23h /xgate/trunk/README.txt
2 Initial Checkin rehayes 5440d 20h /xgate/trunk/README.txt

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