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[/] [xgate/] [trunk/] [README.txt] - Rev 73

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71 Added irq bypass registers to rtl, testbench and doc. rehayes 5221d 09h /xgate/trunk/README.txt
66 Fix testbench and RISC core related to debug mode and wait states. rehayes 5241d 05h /xgate/trunk/README.txt
61 Update to RISC block to fix DEBUG mode, testbench update rehayes 5258d 04h /xgate/trunk/README.txt
58 WISHBONE Bus update. rehayes 5310d 04h /xgate/trunk/README.txt
56 Extensive changes to testbench and the Xgate master bus interface and the way the RISC handles wait states. rehayes 5326d 08h /xgate/trunk/README.txt
51 Corrections to ADC and SBC instructions, First pass at documentaion instruction set details rehayes 5342d 04h /xgate/trunk/README.txt
44 Update for single program counter added, WISHBONE Slave bus word addressability and byte selection rehayes 5376d 02h /xgate/trunk/README.txt
41 Update for singel program counter added, WISHBONE Slave bus word addressability and byte selection rehayes 5377d 05h /xgate/trunk/README.txt
38 Nov 9 2009 update notes rehayes 5405d 09h /xgate/trunk/README.txt
23 Oct 7, 2009 Update rehayes 5438d 04h /xgate/trunk/README.txt
14 Sept 23 2009 Change update rehayes 5452d 05h /xgate/trunk/README.txt
5 Update for memory wait states, testbench and instruction decoder simplified for synthesis rehayes 5465d 05h /xgate/trunk/README.txt
2 Initial Checkin rehayes 5473d 03h /xgate/trunk/README.txt

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