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[/] [xgate/] [trunk/] [bench/] [verilog/] [tst_bench_top.v] - Rev 26

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21 Added timeout, total error count, and XGCHN test rehayes 5535d 04h /xgate/trunk/bench/verilog/tst_bench_top.v
11 Update with Single Step debuging test rehayes 5549d 04h /xgate/trunk/bench/verilog/tst_bench_top.v
5 Update for memory wait states, testbench and instruction decoder simplified for synthesis rehayes 5562d 04h /xgate/trunk/bench/verilog/tst_bench_top.v
2 Initial Checkin rehayes 5570d 02h /xgate/trunk/bench/verilog/tst_bench_top.v

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