OpenCores
URL https://opencores.org/ocsvn/xgate/xgate/trunk

Subversion Repositories xgate

[/] [xgate/] [trunk/] [rtl/] [verilog/] [xgate_top.v] - Rev 10

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
5 Update for memory wait states, testbench and instruction decoder simplified for synthesis rehayes 5560d 10h /xgate/trunk/rtl/verilog/xgate_top.v
2 Initial Checkin rehayes 5568d 07h /xgate/trunk/rtl/verilog/xgate_top.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.