URL https://opencores.org/ocsvn/xgate/xgate/trunk

Subversion Repositories xgate

[/] [xgate/] [trunk/] [rtl/] [verilog/] [xgate_wbm_bus.v] - Rev 17

Rev	Log message	Author	Age	Path
12	Single step debug working, added software error interrupt output, added WISHBONE master module, fixed control register bits	rehayes	5423d 07h	/xgate/trunk/rtl/verilog/xgate_wbm_bus.v