URL https://opencores.org/ocsvn/xge_mac/xge_mac/trunk

Subversion Repositories xge_mac

[/] [xge_mac/] [trunk/] [rtl/] [auto_verilog.sh] - Rev 26

Rev	Log message	Author	Age	Path
24	Use FIFO's for statistics clock domain crossing	antanguay	4227d 01h	/xge_mac/trunk/rtl/auto_verilog.sh
23	Adding basic packet stats	antanguay	4227d 07h	/xge_mac/trunk/rtl/auto_verilog.sh
21	Improvements for timing, adding alternate FIFO design using XIL define	antanguay	4229d 04h	/xge_mac/trunk/rtl/auto_verilog.sh
20	Updates for Xilinx synthesis	antanguay	4518d 22h	/xge_mac/trunk/rtl/auto_verilog.sh
7	New directory structure.	root	5583d 15h	/xge_mac/trunk/rtl/auto_verilog.sh
2	Initial revision	antanguay	5866d 03h	/xge_mac/trunk/rtl/auto_verilog.sh