URL https://opencores.org/ocsvn/xge_mac/xge_mac/trunk

Subversion Repositories xge_mac

[/] [xge_mac/] [trunk/] [rtl/] [include/] [defines.v] - Rev 24

Rev	Log message	Author	Age	Path
24	Use FIFO's for statistics clock domain crossing	antanguay	4366d 08h	/xge_mac/trunk/rtl/include/defines.v
23	Adding basic packet stats	antanguay	4366d 14h	/xge_mac/trunk/rtl/include/defines.v
22	Added prototype system verilog testbench	antanguay	4368d 11h	/xge_mac/trunk/rtl/include/defines.v
12	Change interface to big endian, added serdes examples to testbench	antanguay	5444d 13h	/xge_mac/trunk/rtl/include/defines.v
7	New directory structure.	root	5722d 22h	/xge_mac/trunk/rtl/include/defines.v
6	Updated spec. Added mod[2:0] signals. Timing improvements.	antanguay	5999d 06h	/xge_mac/trunk/rtl/include/defines.v
2	Initial revision	antanguay	6005d 10h	/xge_mac/trunk/rtl/include/defines.v