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[/] [xge_mac/] [trunk/] [rtl/] [verilog/] [sync_clk_core.v] - Rev 13

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Rev Log message Author Age Path
12 Change interface to big endian, added serdes examples to testbench antanguay 5439d 19h /xge_mac/trunk/rtl/verilog/sync_clk_core.v
7 New directory structure. root 5718d 05h /xge_mac/trunk/rtl/verilog/sync_clk_core.v
2 Initial revision antanguay 6000d 16h /xge_mac/trunk/rtl/verilog/sync_clk_core.v

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