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[/] [xge_mac/] [trunk/] [rtl/] [verilog/] [sync_clk_core.v] - Rev 15

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Rev Log message Author Age Path
12 Change interface to big endian, added serdes examples to testbench antanguay 5450d 16h /xge_mac/trunk/rtl/verilog/sync_clk_core.v
7 New directory structure. root 5729d 01h /xge_mac/trunk/rtl/verilog/sync_clk_core.v
2 Initial revision antanguay 6011d 13h /xge_mac/trunk/rtl/verilog/sync_clk_core.v

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