URL https://opencores.org/ocsvn/xucpu/xucpu/trunk

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[/] [xucpu/] [trunk/] [src/] [util/] [file/] [hexio.vhdl] - Rev 41

Rev	Log message	Author	Age	Path
27	When loading the 32k memory, do not let the process stop by a file that is shorter, also make sure that the process is stopped if the file should be longer.	lcdsgmtr	3424d 05h	/xucpu/trunk/src/util/file/hexio.vhdl
25	Problem with memory: created conditional generate based upon data width instead of address width.	lcdsgmtr	3426d 04h	/xucpu/trunk/src/util/file/hexio.vhdl
24	Starting tracing through the component hierarchy initialisation.	lcdsgmtr	3426d 04h	/xucpu/trunk/src/util/file/hexio.vhdl
17	Moving the generic block ram component piece by piece to a better implementation.	lcdsgmtr	3426d 04h	/xucpu/trunk/src/util/file/hexio.vhdl
16	Re-write of memory in function of initial array memory blocks.	lcdsgmtr	3426d 04h	/xucpu/trunk/src/util/file/hexio.vhdl
7	Moved package for initialising memory also to src.	lcdsgmtr	3559d 03h	/xucpu/trunk/src/util/file/arrayio.vhdl
2	First checkin to make sure that the project does not get stale.	lcdsgmtr	3682d 05h	/xucpu/trunk/VHDL/file/arrayio.vhdl