URL https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk

Subversion Repositories xulalx25soc

[/] [xulalx25soc/] [trunk/] [doc/] [wishbone.html] - Rev 117

Rev	Log message	Author	Age	Path
117	Updates, to include new README and bench/cpp/Makefile that doesnt depend upon a static VERILATOR_ROOT location.	dgisselq	2960d 00h	/xulalx25soc/trunk/doc/wishbone.html
82		dgisselq	3090d 20h	/xulalx25soc/trunk/doc/wishbone.html
81	Adds register values for the SD-Card registers.	dgisselq	3090d 21h	/xulalx25soc/trunk/doc/wishbone.html
31	A bug fix, although one that rearranges the bus. The first four I/O locations have been adjusted. The new locations are reflected in wishbone.html. In addition, the PWM and UART devices no longer create bus errors when accessed. Finally, this version uses a `define XULA25 to determine whether or not to build for the XuLA2-LX9 or the XuLA2-LX25. If defined, it will build for the XuLA2-LX25. If not, for the XuLA2-LX9. The ideal location for this define would be to place it into your Xilinx configuration, should you wish to build for the LX25.	dgisselq	3180d 23h	/xulalx25soc/trunk/doc/wishbone.html
6	Initial file load, likely to be buggy, but the initial load nonetheless.	dgisselq	3251d 19h	/xulalx25soc/trunk/doc/wishbone.html