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[/] [xulalx25soc/] [trunk/] [rtl/] [Makefile] - Rev 113

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113 Lots of updates, mostly focused on getting the XuLA board and CPU able to pass
a comprehensive test suite. At this point, everything passes and logic usage
is down even. Among the few changes includes the "break" bit in the uCC
register, used to indicate a switch to supervisor mode occurred as a result
of a user break, and the ability for the supervisor to clear the instruction
cache.
dgisselq 3052d 23h /xulalx25soc/trunk/rtl/Makefile
74 Adds the SD-card capability, and connects the debug wires to/from the uartdev
in case it needs to be debugged.
dgisselq 3090d 18h /xulalx25soc/trunk/rtl/Makefile
7 Mostly minor changes. Fixed the legal copyright statement in the UART files,
adjusted some comments, and made sure that the zipdbg program contained all
the latest features from our Vault.
dgisselq 3251d 06h /xulalx25soc/trunk/rtl/Makefile
3 dgisselq 3251d 16h /xulalx25soc/trunk/rtl/Makefile
2 A very first, albeit incomplete, build. dgisselq 3251d 16h /xulalx25soc/trunk/rtl/Makefile

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