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[/] [xulalx25soc/] [trunk/] [rtl/] [memdev.v] - Rev 116

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113 Lots of updates, mostly focused on getting the XuLA board and CPU able to pass
a comprehensive test suite. At this point, everything passes and logic usage
is down even. Among the few changes includes the "break" bit in the uCC
register, used to indicate a switch to supervisor mode occurred as a result
of a user break, and the ability for the supervisor to clear the instruction
cache.
dgisselq 3059d 14h /xulalx25soc/trunk/rtl/memdev.v
55 Updated copyright notice. dgisselq 3105d 09h /xulalx25soc/trunk/rtl/memdev.v
2 A very first, albeit incomplete, build. dgisselq 3258d 07h /xulalx25soc/trunk/rtl/memdev.v

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