URL https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk

Subversion Repositories xulalx25soc

[/] [xulalx25soc/] [trunk/] [rtl/] [wbubus.v] - Rev 118

Rev	Log message	Author	Age	Path
102	Updated documentation. The documentation for these now also reflects that these were drawn from an FPGA Library project, that is shared among many FPGA builds.	dgisselq	2889d 01h	/xulalx25soc/trunk/rtl/wbubus.v
46	This is a bug fix release--fixing the bug that kept dumpsdram.cpp/wbsdram.v from working when long pipelined reads were interrupted by the necessity of a pair of refresh cycles.	dgisselq	2996d 06h	/xulalx25soc/trunk/rtl/wbubus.v
43	Commentary changes only, no substance.	dgisselq	3000d 01h	/xulalx25soc/trunk/rtl/wbubus.v
9	Bug fixes, optimizations, etc. as part of building for an actual hardware implementation. Most notably, the speed was lowered from 80MHz down to 76 MHz.	dgisselq	3076d 03h	/xulalx25soc/trunk/rtl/wbubus.v
2	A very first, albeit incomplete, build.	dgisselq	3079d 00h	/xulalx25soc/trunk/rtl/wbubus.v