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[/] [xulalx25soc/] [trunk/] [xula.ucf] - Rev 113

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113 Lots of updates, mostly focused on getting the XuLA board and CPU able to pass
a comprehensive test suite. At this point, everything passes and logic usage
is down even. Among the few changes includes the "break" bit in the uCC
register, used to indicate a switch to supervisor mode occurred as a result
of a user break, and the ability for the supervisor to clear the instruction
cache.
dgisselq 3056d 16h /xulalx25soc/trunk/xula.ucf
71 Needed to play with subtle timing to get this to build. Expect me to play
with these two clock numbers more.
dgisselq 3094d 11h /xulalx25soc/trunk/xula.ucf
6 Initial file load, likely to be buggy, but the initial load nonetheless. dgisselq 3255d 09h /xulalx25soc/trunk/xula.ucf

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