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[/] [yac/] [trunk/] [rtl/] [vhdl/] [cordic_iterative_int.vhd] - Rev 4

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4 Updated C and RTL model as well as the documentation feddischson 3446d 17h /yac/trunk/rtl/vhdl/cordic_iterative_int.vhd
3 initial commit feddischson 3446d 17h /yac/trunk/rtl/vhdl/cordic_iterative_int.vhd
2 First stable version: RTL model is verified with C-model via RTL simulations. feddischson 3896d 04h /yac/trunk/rtl/vhdl/cordic_iterative_int.vhd

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