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[/] [zipcpu/] [trunk/] [bench/] [asm/] [zipdhry.S] - Rev 112

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86 Removed the requirement to have the dev.scope.cpu hardware defined outside
of the Zip CPU (it was defined in another project). This was causing a bus
error in the simulator (which it should have), but taking it out fixes things
in the simulator (while removing capability from one special piece of H/W).		 dgisselq 3236d 19h /zipcpu/trunk/bench/asm/zipdhry.S
74 Added a bunch of debugging code to the Dhrystone benchmark assembly file, as
well as two new testing assembly files.		 dgisselq 3241d 23h /zipcpu/trunk/bench/asm/zipdhry.S
69 This implements the "new Instruction Set" architecture for the Zip CPU. It's
a massive change set, that touches just about everything but probably not
enough of everything. Please see the spec.pdf for a description of this
new architecture.		 dgisselq 3248d 03h /zipcpu/trunk/bench/asm/zipdhry.S
57 Some bug fixes to the dhrystone benchmark, and some compile time defines for
the test bench processor. Of the most important note is the fix to detect
lockups on the debug/wishbone bus--that has been a real help in getting the
ZipCPU installed and the debugger working on the various boards I'm working
with. (i.e., it's helped me find and figure out why/when things haven't worked)
Of other note is the new 'G' key in the testbench code, to cause the test
bench to run without user interaction until the next keystroke. This is
very valuable in long programs, as it makes getting to/from breakpoints
easier (i.e. you don't have to wait as long, hit 'G', breathe, hit 'space'
and you're there).		 dgisselq 3319d 06h /zipcpu/trunk/bench/asm/zipdhry.S
50 Dhrystone benchmark updates--added the copyright notice. (Oops!) dgisselq 3328d 21h /zipcpu/trunk/bench/asm/zipdhry.S
41 Assembly file for the Dhrystone benchmark added. dgisselq 3328d 22h /zipcpu/trunk/bench/asm/zipdhry.S

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