URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [rtl/] [core/] [pipefetch.v] - Rev 15

Rev	Log message	Author	Age	Path
11	This version works on an FPGA!!! (Or at least the wdt.S program passes ...)	dgisselq	3434d 06h	/zipcpu/trunk/rtl/core/pipefetch.v
3	Rebuilt the pipefetch (instruction fetch/cache module) so that it will let go of the bus if the memory unit wants it to execute an instruction. Pipefetch will then grab the bus back whtn the memory unit is done, so things otherwise continue as they were before. Other tweaks were made to try to reduce code complexity.	dgisselq	3435d 03h	/zipcpu/trunk/rtl/core/pipefetch.v
2	An initial load. No promises of what works or not, but this is where the project is at.	dgisselq	3435d 20h	/zipcpu/trunk/rtl/core/pipefetch.v