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[/] [zipcpu/] [trunk/] [rtl/] [peripherals/] [flashcache.v] - Rev 147

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69 This implements the "new Instruction Set" architecture for the Zip CPU. It's
a massive change set, that touches just about everything but probably not
enough of everything. Please see the spec.pdf for a description of this
new architecture.
dgisselq 3277d 11h /zipcpu/trunk/rtl/peripherals/flashcache.v
2 An initial load. No promises of what works or not, but this is where the
project is at.
dgisselq 3426d 06h /zipcpu/trunk/rtl/peripherals/flashcache.v

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