OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [sw/] [lib/] [mpy32s.S] - Rev 128

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
69 This implements the "new Instruction Set" architecture for the Zip CPU. It's
a massive change set, that touches just about everything but probably not
enough of everything. Please see the spec.pdf for a description of this
new architecture.
dgisselq 3240d 14h /zipcpu/trunk/sw/lib/mpy32s.S
59 Adjusted these library routines to use the new stack frame and calling
conventions.
dgisselq 3301d 15h /zipcpu/trunk/sw/lib/mpy32s.S
45 Library routines for 32-bit multiply and divide, both signed and unsigned. dgisselq 3321d 09h /zipcpu/trunk/sw/lib/mpy32s.S

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.