OpenCores
URL https://opencores.org/ocsvn/6809_6309_compatible_core/6809_6309_compatible_core/trunk

Subversion Repositories 6809_6309_compatible_core

[/] [6809_6309_compatible_core/] [trunk/] [rtl/] [verilog/] [defs.v] - Rev 14

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
14 Improved speed and reduced decoder complexity ale500 3589d 01h /6809_6309_compatible_core/trunk/rtl/verilog/defs.v
12 Fixed inc, dec, indirect indexed, mul, shifts, h flag ale500 3603d 00h /6809_6309_compatible_core/trunk/rtl/verilog/defs.v
9 Implemented E flag, some minor optimizations ale500 3784d 01h /6809_6309_compatible_core/trunk/rtl/verilog/defs.v
6 Implemented CWAI. Minor optimizations ale500 3788d 21h /6809_6309_compatible_core/trunk/rtl/verilog/defs.v
5 EXG/TFR Implemented ale500 3789d 17h /6809_6309_compatible_core/trunk/rtl/verilog/defs.v
4 Bugfix and enhancements ale500 3790d 23h /6809_6309_compatible_core/trunk/rtl/verilog/defs.v
2 Initial version ale500 3792d 20h /6809_6309_compatible_core/trunk/rtl/verilog/defs.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.