OpenCores
URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] - Rev 185

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
185 root 5539d 12h /
184 initial inport. simont 7604d 16h /
183 This commit was manufactured by cvs2svn to create tag 'rel_19'. 7618d 04h /
182 This commit was manufactured by cvs2svn to create tag 'rel_12'. 7618d 04h /
181 Simulation reports added. simont 7618d 04h /
180 This commit was manufactured by cvs2svn to create tag 'rel_2'. 7618d 05h /
179 add /* synopsys xx_case */ to case statments. simont 7618d 05h /
178 x replaced with 0. simont 7618d 07h /
177 Fix bug in case of writing and reading from same address. simont 7629d 10h /
176 ram modules added. simont 7629d 12h /
175 initial inport. simont 7629d 12h /
174 ram modules added. simont 7629d 12h /
173 simualtion `ifdef added simont 7629d 12h /
172 BIST signals added. simont 7632d 12h /
171 fix bug in DA operation. simont 7640d 09h /
170 removing unused files. simont 7640d 09h /
169 remove unused files. simont 7640d 09h /
168 modify program list. simont 7640d 10h /
167 add readmem for ea. simont 7643d 15h /
166 Change test monitor from ports to external data memory. simont 7644d 09h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.