OpenCores
URL https://opencores.org/ocsvn/System09/System09/trunk

Subversion Repositories System09

[/] [System09/] [trunk/] [rtl/] [System09_Digilent_Atlys/] [system09.vhd] - Rev 212

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
212 Switched from VGA output to HDMI output. davidgb 1172d 15h /System09/trunk/rtl/System09_Digilent_Atlys/system09.vhd
209 Started adding in keyboard (not tested).
Added in green-only VGA output thru Pmod port to PmodVGA J2 port.
Started working on HDMI output
davidgb 1172d 17h /System09/trunk/rtl/System09_Digilent_Atlys/system09.vhd
195 Switched to using the UART over usb for the console port. davidgb 1238d 12h /System09/trunk/rtl/System09_Digilent_Atlys/system09.vhd
194 Finally have a working board. davidgb 1238d 12h /System09/trunk/rtl/System09_Digilent_Atlys/system09.vhd
192 Fixed part of the ACIA problem - the polarity of the NMI was wrong. Now get clean output but input to the ACIA is not working. davidgb 1238d 16h /System09/trunk/rtl/System09_Digilent_Atlys/system09.vhd
186 Somewhat functional boot to SBUG. ACIA freq is wrong but sometimes works if hyperterm set to 115kBps davidgb 1245d 16h /System09/trunk/rtl/System09_Digilent_Atlys/system09.vhd
185 Reverted back to the single-step version - something was broken davidgb 1245d 17h /System09/trunk/rtl/System09_Digilent_Atlys/system09.vhd
175 Corrected RS-232 pin connections. Cleaned up code. Removed debug code.
System boots but the baud clock must be wrong - get garbage on hyperterm.
davidgb 1246d 07h /System09/trunk/rtl/System09_Digilent_Atlys/system09.vhd
174 Added button debounce. Single-step button. multiplex LED to show nibbles of addr and data for debug. Confirmed that CPU is reading from sys09swt.vhd SBug ROM correctly. Still need to debug ACIA output. davidgb 1246d 11h /System09/trunk/rtl/System09_Digilent_Atlys/system09.vhd
173 Add another 16k BRAM for 56K total memory davidgb 1248d 06h /System09/trunk/rtl/System09_Digilent_Atlys/system09.vhd
170 More debugging. Can now see cpu_addr incrementing correctly.
Added 32k BRAM 0000-7FFF.
davidgb 1248d 12h /System09/trunk/rtl/System09_Digilent_Atlys/system09.vhd
169 Fixed clock connection and reset button polarity. Debug LED counting and cpu_clk now indicates some activity. davidgb 1248d 17h /System09/trunk/rtl/System09_Digilent_Atlys/system09.vhd
162 stripped down to most basic system (no vdu, keyboard, sdram, ide, etc). davidgb 1249d 07h /System09/trunk/rtl/System09_Digilent_Atlys/system09.vhd
148 Check in Atlys work davidgb 1492d 22h /System09/trunk/rtl/System09_Digilent_Atlys/system09.vhd
141 Started work on version for Digilent Atlys SPARTAN6 board (does not build, just infrastructure to start the project) davidgb 1528d 15h /System09/trunk/rtl/System09_Digilent_Atlys/system09.vhd

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.