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[/] [System09/] [trunk/] [rtl/] [System09_Digilent_Atlys/] [system09.xise] - Rev 175

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Rev Log message Author Age Path
175 Corrected RS-232 pin connections. Cleaned up code. Removed debug code.
System boots but the baud clock must be wrong - get garbage on hyperterm.
davidgb 621d 23h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
174 Added button debounce. Single-step button. multiplex LED to show nibbles of addr and data for debug. Confirmed that CPU is reading from sys09swt.vhd SBug ROM correctly. Still need to debug ACIA output. davidgb 622d 02h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
173 Add another 16k BRAM for 56K total memory davidgb 623d 22h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
170 More debugging. Can now see cpu_addr incrementing correctly.
Added 32k BRAM 0000-7FFF.
davidgb 624d 03h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
158 switch to stock SWT boot rom and flex9ram davidgb 625d 04h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
152 More atlys cleanup davidgb 868d 13h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
148 Check in Atlys work davidgb 868d 14h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
146 davidgb 870d 02h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
141 Started work on version for Digilent Atlys SPARTAN6 board (does not build, just infrastructure to start the project) davidgb 904d 07h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise

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