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Rev Log message Author Age Path
223 -- 0.3 David Burnette 8 April 2021 Added read-back of clk/transfer size
-- as well as a debug tag to confirm
-- read operation
davidgb 1146d 02h /
222 Added SPI master to project. Pick up Atlys rom davidgb 1146d 02h /
221 Completed Atlys option davidgb 1146d 02h /
220 checkin davidgb 1146d 02h /
219 back out last change davidgb 1146d 07h /
218 Added ROM variation for Digilent Atlys board davidgb 1146d 08h /
217 Extended debug sw to show keyboard data. PS/2 keyboard now works on USB HID (you must use a PS/2 keyboard + PS/2-to-USB dongle for it to work). davidgb 1149d 06h /
216 Get rid of warning about unconnected CLK0 pin davidgb 1149d 06h /
215 Update project after switching to xilinx block ram davidgb 1149d 09h /
214 Switch to Xilinx block ram davidgb 1149d 09h /
213 updated project file davidgb 1149d 09h /
212 Switched from VGA output to HDMI output. davidgb 1149d 09h /
211 New version of VDU8 that has HDMI output. Still needs work refactoring clock signals. davidgb 1149d 09h /
210 Check in code fragment implementing HDMI/TMDS encoding.
Derived from HDMI_test.v (c) & KNJN LLC 2013
davidgb 1149d 09h /
209 Started adding in keyboard (not tested).
Added in green-only VGA output thru Pmod port to PmodVGA J2 port.
Started working on HDMI output
davidgb 1149d 11h /
208 swapped 32k and 16k ram to use block_spram. davidgb 1193d 12h /
207 Updated design to pick up vdu8_spram (which uses parameterized ram for video memory instead of hard macros) davidgb 1193d 13h /
206 Update comment/cleanup davidgb 1193d 13h /
205 A new version of VDU8 that uses the parameterized xilinx ram "block_spram" for the video memory. davidgb 1193d 13h /
204 patched up ram for zybo use davidgb 1193d 13h /
203 Added a parameterized ram model. davidgb 1193d 13h /
202 Updated Zybo design to reintroduce VDU8 driving the PmodVGA on pmod connectors JC+JD.
This version also uses PmodUSBUART on JE. To use PmodRS232 you must edit the .ucf file and select the appropriate pin LOCs.
davidgb 1193d 14h /
201 A copy of XSA-3S1000.ucf and System09_Xess_XSA-3S1000.vhd that have dual serial ports with no handshake. davidgb 1200d 08h /
200 Started adding back in video support - VDU8 instantiated and RGBHV bits sent to Pmod JE port. davidgb 1207d 06h /
199 Add in full RS-232 handshake for PmodUSBUART. davidgb 1208d 07h /
198 Update UCF file to select Pmod pinout compatible with the PmodUSBUART.
To use, make sure PmodUSBUART has JP1 as "LCL". Connect the usb to the uart and open the terminal program. Test the transmission via the LED on the Pmod. Then (carefully) plug into Pmod port on Zybo.
davidgb 1208d 09h /
197 Updates from John Kent:
-- 4.5 John Kent 2012-02-04 Re-arranged Rx & Tx Baud clock edge detect.
-- 4.6 John Kent 3021-01-30 Double sample RxC, TxC, and RxD with cpu_clk
-- for 125MHz Clock on Zybo Z7 board.
davidgb 1215d 06h /
196 Working system boots to SBUG. Uses RS232 Pmod (no handshake) and 57600,8,N,1 (no handshake) hyperterm. davidgb 1215d 06h /
195 Switched to using the UART over usb for the console port. davidgb 1215d 07h /
194 Finally have a working board. davidgb 1215d 07h /

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