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Rev	Log message	Author	Age	Path
20	Revert "Corrected unconnected enable line" in memory_ifc module. Fixes erroneous extra delay of nIORQ signal on INT ACK.	gdevic	1970d 18h	/a-z80/
19	Some documentation updates	gdevic	1981d 22h	/a-z80/
18	Correctly latch IO RW wait request Fixed bug: Issuing nWAIT during IO RW was ignored (IORQ, not M1) Taping into a correct point of IORQ generator sequence train gives an additional signal to be OR-ed when composing a generic latch_wait Corrected unconnected enable line	gdevic	2259d 12h	/a-z80/
17	z80: Release 5	gdevic	2667d 12h	/a-z80/
16	Simplify by adding nhold_clk_wait Inverted version is used to feel AND gates to enable Keep hold_clk_wait used only in the sequencer	gdevic	2700d 03h	/a-z80/
15	zxspectrum: Fix few Quartus warnings	gdevic	2700d 14h	/a-z80/
14	Add hold_clk_wait to ALU CFL latch This correctly delays latching the C-Flag for CCF instruction when nWAIT was asserted at that instruction's M1/T2 cycle UART: fixed two synthesis warnings	gdevic	2700d 15h	/a-z80/
13	Full support for nWAIT during M1 and memory cycles This set of changes fixes issues with nWAIT signal Updated reg control, resets, ir modules to handle delay This correctly delays clearing of IR if the nWAIT was asserted at the very first M1 cycle Simplify decode_state to use discrete write enable for CB/ED flags Gate CB/ED write with hold_clk_wait to enable nWAIT delay genfuse add code to test nWAIT insertion at M1 Add host wait state circuitry from Zilog manual (wait_state.*) Add wait test code to basic fpga/modelsim models Select from 3 options to test wait states: - no wait state inserted (nWAIT=1) - insert a wait state to every M1 cycle - insert a wait state to each memory access cycle zxspectrum: Add custom NMI handler and a function to enter game pokes after pressing the NMI button zxspectrum: Corrected bits 7,5 when reading ULA port 254 zxspectrum: Fix the shift key repeat bug When using additional keys (<,>,?,...) and shift was released before a symbol, it would repeat. This change fixes that by correctly resetting keyboard mask state bitfields. Added new data pins module for Lattice toolset It has been reported that "data_pins.v" does not compile on Lattice toolset and this variation of the code has been proposed and verified by a user. Fixed M1 during reset Memory_ifc module set M1 to inactive (high) during nRESET Exported wait_m1 signal from that module as a testpoint	gdevic	2701d 11h	/a-z80/
12	Explicitly set python to execute within a batch file	gdevic	2714d 04h	/a-z80/
11	zxspectrum improvements: - Added ZX Spectrum ROM mods as described in the blog: http://www.baltazarstudios.com/zx-spectrum-rom-mods This mod allows NMI interrupt to break into a special handler code inside the ROM image and let the user type a POKE address (5 decimal digits) + value (3 decimal digits) to modify a memory location - Changed default joystick pins to Atari style joystick as described in the blog - Added a timing constraints file	gdevic	2926d 13h	/a-z80/
10	zxspectrum: Various improvements - Fixed keyboard bug (by Bogdan S.) - Minor comment changes - Renamed reset to nreset	gdevic	2972d 04h	/a-z80/
9	Updated documentation	gdevic	2972d 22h	/a-z80/
8	z80: Release 4	gdevic	2973d 00h	/a-z80/
7	z80: Fixing repeating INIR/OTIR class of instructions	gdevic	3037d 04h	/a-z80/
6	Added deployment folder with all files needed to use the CPU Changed ZX Spectrum project to use deployment files as example Changed extension for Verilog include files from .i to .vh Updated documentation; added section on file generators Minor corrections and fixes to various files	gdevic	3387d 14h	/a-z80/
5	zxspectrum: Various improvements - Added "Turbo" speed mode switch (SW2) - Turbo speed is (3.5 MHz x 2 = 7.0 MHz) - LEDG5 lits when a key is being pressed - LEDG6 blinks when a speaker/line-in is being toggled Misc: - Fixed a false clock for ula:beep - Fixed unused Kempston input warning - Updated documentation to 1.1	gdevic	3417d 04h	/a-z80/
4	- Removed files that are left in the root folder	gdevic	3423d 04h	/a-z80/
3	- New directory structure - Added documentation files (and PDF versions) - Fixed tests	gdevic	3423d 04h	/a-z80/
2	Initial import of the A-Z80 project files.	gdevic	3429d 04h	/a-z80/
1	The project and the structure was created	root	3429d 11h	/a-z80/

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[/] [a-z80/] - Rev 20

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