OpenCores
URL https://opencores.org/ocsvn/altor32/altor32/trunk

Subversion Repositories altor32

[/] [altor32/] - Rev 30

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
30 Fix verilog issues which break in XST. ultra_embedded 3878d 20h /altor32/
29 Added top level makefile ultra_embedded 3878d 23h /altor32/
28 Added instruction set simulator ultra_embedded 3878d 23h /altor32/
27 Initial drop of AltOR32 v2 ultra_embedded 3879d 16h /altor32/
26 Prepare for new release ultra_embedded 3879d 17h /altor32/
25 Added Papilio Pro (XC6LX9) project.

http://papilio.gadgetfactory.net/index.php?n=Papilio.PapilioPro		 ultra_embedded 4074d 18h /altor32/
24 Re-sync from local repository. ultra_embedded 4074d 19h /altor32/
23 - Bootloader code clean-up. ultra_embedded 4312d 20h /altor32/
22 - Added RTOS example project. ultra_embedded 4312d 20h /altor32/
21 - Added RTOS with port for AltOR32. ultra_embedded 4312d 21h /altor32/
20 - Added GPIO peripheral (with interrupt support). ultra_embedded 4312d 23h /altor32/
19 - IRQ_STATUS now reports all interrupts regardless of IRQ_MASK status. ultra_embedded 4312d 23h /altor32/
18 - Fixed sign extension handling of some l.sf**ui instructions. ultra_embedded 4317d 13h /altor32/
17 - Option to specify IRQ vector offset. ultra_embedded 4320d 13h /altor32/
16 - Clean-up. ultra_embedded 4320d 13h /altor32/
15 - Improved peripheral register interface.
- Papilio XC3S250E FPGA project now uses pipelined core @ 32MHz.		 ultra_embedded 4320d 20h /altor32/
14 Added initial version of pipelined AltOR32 core. ultra_embedded 4321d 00h /altor32/
13 Fixed l.lhs sign extension bug.
Removed duplicate instruction definitions.		 ultra_embedded 4327d 00h /altor32/
12 - Removed broken memory stall signal support on basic implementation. ultra_embedded 4340d 13h /altor32/
11 - Added missing library file. ultra_embedded 4341d 16h /altor32/
10 - Added example Papilio One (XC3S250E) project.
Contains bootloader accessible via USB uart @ 115200.		 ultra_embedded 4341d 16h /altor32/
9 - Added bin->Xilinx blockRAM init tool. ultra_embedded 4341d 16h /altor32/
8 - Added X-Modem bootloader ultra_embedded 4341d 16h /altor32/
7 - Fixed verilator makefile. ultra_embedded 4341d 16h /altor32/
6 - Simplified interrupt handling
- Added optional boot address argument		 ultra_embedded 4341d 16h /altor32/
5 Added verilator simulation.
Added basic peripherals & soc.		 ultra_embedded 4343d 12h /altor32/
4 Added initial basic core RTL implementation (non-pipelined). ultra_embedded 4343d 12h /altor32/
3 Added top level makefile.
Builds simulator & executes basic test image.		 ultra_embedded 4347d 17h /altor32/
2 Added a simple simulator for OpenRisc 1000, where only the essential instructions have been implemented.

Runs code compiled with the following flags:
-msoft-div -msoft-float -msoft-mul -mno-ror -mno-cmov -mno-sext		 ultra_embedded 4347d 18h /altor32/
1 The project and the structure was created root 4348d 15h /altor32/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.