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[/] [altor32/] [trunk/] - Rev 17

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Rev Log message Author Age Path
17 - Option to specify IRQ vector offset. ultra_embedded 4321d 00h /altor32/trunk/
16 - Clean-up. ultra_embedded 4321d 00h /altor32/trunk/
15 - Improved peripheral register interface.
- Papilio XC3S250E FPGA project now uses pipelined core @ 32MHz.		 ultra_embedded 4321d 07h /altor32/trunk/
14 Added initial version of pipelined AltOR32 core. ultra_embedded 4321d 11h /altor32/trunk/
13 Fixed l.lhs sign extension bug.
Removed duplicate instruction definitions.		 ultra_embedded 4327d 11h /altor32/trunk/
12 - Removed broken memory stall signal support on basic implementation. ultra_embedded 4341d 00h /altor32/trunk/
11 - Added missing library file. ultra_embedded 4342d 03h /altor32/trunk/
10 - Added example Papilio One (XC3S250E) project.
Contains bootloader accessible via USB uart @ 115200.		 ultra_embedded 4342d 03h /altor32/trunk/
9 - Added bin->Xilinx blockRAM init tool. ultra_embedded 4342d 03h /altor32/trunk/
8 - Added X-Modem bootloader ultra_embedded 4342d 03h /altor32/trunk/
7 - Fixed verilator makefile. ultra_embedded 4342d 03h /altor32/trunk/
6 - Simplified interrupt handling
- Added optional boot address argument		 ultra_embedded 4342d 03h /altor32/trunk/
5 Added verilator simulation.
Added basic peripherals & soc.		 ultra_embedded 4343d 23h /altor32/trunk/
4 Added initial basic core RTL implementation (non-pipelined). ultra_embedded 4343d 23h /altor32/trunk/
3 Added top level makefile.
Builds simulator & executes basic test image.		 ultra_embedded 4348d 04h /altor32/trunk/
2 Added a simple simulator for OpenRisc 1000, where only the essential instructions have been implemented.

Runs code compiled with the following flags:
-msoft-div -msoft-float -msoft-mul -mno-ror -mno-cmov -mno-sext		 ultra_embedded 4348d 05h /altor32/trunk/
1 The project and the structure was created root 4349d 02h /altor32/trunk/

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