URL https://opencores.org/ocsvn/altor32/altor32/trunk

Subversion Repositories altor32

[/] [altor32/] [trunk/] [rtl/] [cpu/] - Rev 45

Rev	Log message	Author	Age	Path
45	Fix use before declaration (fails on older ISE variants).	ultra_embedded	3600d 10h	/altor32/trunk/rtl/cpu/
44	Add single step support	ultra_embedded	3648d 14h	/altor32/trunk/rtl/cpu/
40	- Add support for 2 way instruction cache (not yet enabled) - Bug fixes and tidy up	ultra_embedded	3662d 18h	/altor32/trunk/rtl/cpu/
39	Bug fix interrupt handling after last update.	ultra_embedded	3667d 14h	/altor32/trunk/rtl/cpu/
37	- Add icarus sim test - Adopt consistent naming scheme - Simplify instruction cache	ultra_embedded	3676d 22h	/altor32/trunk/rtl/cpu/
36	Various performance improvements and bug fixes.	ultra_embedded	3682d 11h	/altor32/trunk/rtl/cpu/
32	Switch memory interfaces to Wishbone (pipelined). Various bug fixes and improvements.	ultra_embedded	3775d 15h	/altor32/trunk/rtl/cpu/
31	Improvements to the execute stage logic.	ultra_embedded	3795d 16h	/altor32/trunk/rtl/cpu/
30	Fix verilog issues which break in XST.	ultra_embedded	3879d 19h	/altor32/trunk/rtl/cpu/
27	Initial drop of AltOR32 v2	ultra_embedded	3880d 15h	/altor32/trunk/rtl/cpu/